Download the this issue (complete journal, including cover) (~1.8 MB).
Download the
cover (Editorial Board Information) (~232 kB).
Table of Contents (~64 kB)
Guest editorial by M. du Plessis (~16 kB)
Jump to:
-
Silicon+ - post processing CMOS wafers to create integrated sensors, MEMS and electro-optic systems
-
Design and manufacture of quantum-confined Si light sources
-
A fully CMOS optical transmission system based on light emitting avalanche diodes
-
Characterisation of adaptive fluidic silicone membrane lenses
-
Feasibility of optical clock distribution for future CMOS technology nodes
-
Surface passivation applicable to InAsSb/GaSb photodiodes for infrared detection
-
ZnO grown by metal organic chemical vapor deposition: effect of substrate on optical and structural properties
-
3D ultra-fast manufactured micro coils on polymer or metal cores
Silicon+ - post processing CMOS wafers to create integrated sensors, MEMS and electro-optic systems by A.J. Walton, J.T.M. Stevenson, I. Underwood, J.G. Terry, S. Smith, W. Parkes, C. Dunare, H. Lin, Y. Li, R. Henderson, D. Renshaw, B. Rae, K. Muir, M. Desmulliez, D. Flynn, M.J. MacIntosh, W.S. Holland, A. F. Murray, T.B. Tang and A. Bunting
Abstract: Silicon based integrated circuit technology has shown astonishing progress scaling to smaller geometries as the industry follows Moore`s predictions. However, in recent years the cost associated with staying at the leading edge of silicon IC technology has resulted in many companies being either unable, or unwilling, to afford the investment required. As a consequence some have decided to use foundry technology and/or diversify into new device types and associated novel application areas. All of these diverse Silicon+ technologies have one particular feature in common, namely they all use silicon as a platform for system integration with the added value being the innovation associated with post-processing and/or technology integration, which in many cases is realised on standard foundry technology. This paper examines many of the issues associated with integrating foundry and custom IC wafers with both new materials and technologies such as MEMS based sensors and actuators. In particular it examines the various options available for companies considering Silicon+ technology applications and presents examples of successful applications of this approach. Some of these are illustrated below.
Download Paper (~190 kb)
Design and manufacture of quantum-confined Si light sources by A.W. Bogalecki and M. du Plessis
Abstract: To investigate quantum confinement effects on silicon (Si) light source electroluminescence (EL), nanometre-scale Si finger junctions were manufactured in a fully customized silicon-on-insulator (SOI) production technology. The wafers were manufactured in the cleanroom using an electron-beam pattern generator (EPG). The SOI light source with the highest irradiance emitted about 9 times more optical power around l = 850 nm than a 0.35 µm bulk-CMOS avalanche light-source operating at the same current. It is shown that the buried oxide (BOX) layer in a SOI process could be used to reflect about 25 % of otherwise lost downward-radiated light back up to increase the external power efficiency of SOI light sources.
Download Paper (~328 kb)
A fully CMOS optical transmission system based on light emitting avalanche diodes by P. Ellinghaus, P.J. Venter, M. du Plessis and P. Rademeyer
Abstract: The successful realization of optical interconnects for inter- and intra-chip communication strongly depends on the use of a light source that is compatible with existing, well established manufacturing processes – primarily CMOS/VLSI. The problematic integration of III-V light sources with CMOS technology has not been surmounted thus far. While silicon is ill-suited as an optical material, silicon based light sources present a huge advantage: complete monolithic integration using existing CMOS processes. This advantage can only be exploited if these devices show sufficient switching speed and optical power emission to make high speed clock and data transmission feasible. This paper illustrates the switching speed of silicon based light emitting devices in excess of 100 MHz and the viability of using such a device for an all-silicon optical link for clock and data distribution.
Download Paper (~160 kb)
Characterisation of adaptive fluidic silicone membrane lenses by F. Schneider, J. Draheim, J. Brunne, P. Waibel and U. Wallrabe
Abstract: We compare the performance and optical quality of two types of adaptive fluidic silicone-membrane lenses. The membranes feature either a homogeneous thickness, or they are shaped resulting in an inhomogeneous cross-section. The lens systems incorporate a piezoelectric actuator which is operated in a regime of ±40 V. The shaped membrane lenses show lower wave front errors than the planar ones, down to 24 nm. The pumping actuator indicates a maximum pump volume of 1159 nl at an inner piezo radius of 2.75 mm for the smallest supporting ring configuration. The full system with a planar membrane achieves a larger refractive power ranging from +19 to -14 dpt. It also shows a shorter full scale response time (tplanar = 23.9 ms) compared to the shaped membrane (tshaped = 35.4 ms).
Download Paper (~216 kb)
Feasibility of optical clock distribution for future CMOS technology nodes by P.J. Venter and M. du Plessis
Abstract: CMOS is arguably the most successful semiconductor technology in electronics history. This is clear by the constant efforts involved in scaling as the key driver of improving the performance of ICs to keep up with consumer expectations. However, this trend has lately been haltered by another on-chip component: the interconnect. As scaling decreases active device dimensions for a corresponding performance increase, interconnect dimensions suffer under reduction due to increasing capacitance and resistance. One possible solution might be to move the long, power consuming global signal nets into the optical domain. This paper compares predicted electrical versus optical global signal distribution for future nanometre CMOS nodes, based on clock distribution and the associated power consumption.
Download Paper (~245 Kb)
Surface passivation applicable to InAsSb/GaSb photodiodes for infrared detection by V. Odendaal, J.R. Botha and F.D. Auret
Abstract: In this paper the influence of various anodisation solutions on the surface passivation of InAsSb/GaSb photodiodes is examined. The diode structure is based on a design reported by Bubulac et al. [1]. The diode consists of a p-i-n structure grown by MOCVD and nearly lattice matched to a GaSb substrate. The structure, p-InAs1-xSbx/n-InAs1-xSbx/n-GaSb (x = 0.10 in both cases), consisted of a Zn-doped p-type layer and an unintentionally doped n-type layer on the n-type substrate. To define the active area of the photodiode, mesas were etched with a sulphuric acid based solution. Three anodisation solutions, containing Na2S, KOH or (NH4)2S, were tested. Four sets of diodes were processed, using each of the three anodisation solutions as well as an unpassivated reference detector. The effect of passivation was studied by current-voltage measurements, yielding the reverse bias current, as well as by responsivity measurements.
Download Paper (~142 kb)
ZnO grown by metal organic chemical vapor deposition: effect of substrate on optical and structural properties by K. Talla, J.K. Dangbégnon, M.C. Wagener and J.R. Botha
Abstract: This paper reports the effects of the following substrates on the optical, structural and morphological properties of ZnO thin films: Si (100), Si (111), c- and r-sapphire, glass, GaAs and ZnO. The thin films were deposited by low pressure Metal Organic Chemical Vapor Deposition using diethylzinc and tertiary butanol as the zinc and oxygen sources, respectively. X-ray diffraction analysis shows that all the ZnO layers are c-axis orientated. Scanning Electron microscopy reveals similar morphology for all the substrates used, with hexagonal columns having cone shape ends being evident. The photoluminescence spectra are similar, but the various transitions have different relative intensities. It is clear that the different substrates influence neither the orientation of the films, nor the surface morphology, significantly. The photoluminescence hints at larger stacking fault densities in films grown on silicon and glass, however, as evidenced by stronger basal plane stacking fault-related luminescence at ~3.319 eV in the relevant low temperature photoluminescence spectra.
Download Paper (~311 kb)
3D ultra-fast manufactured micro coils on polymer or metal cores by U. Wallrabe, J.G. Korvink, K. Kratt, V. Badilita and B. Mack
Abstract: We present high aspect ratio 3D solenoidal micro coils manufactured in a serial, high speed and fully MEMS compatible winding procedure using an automatic wire bonder. The coils are wound on steel, glass, or polymer cores with a diameter ranging from 100 µm to 1 mm. The applications of these coils are manifold: as semi-integrated inductors for electronics, for energy harvesting purposes, and for sensors and actuators.
Download Paper (~311 kb)